Real-time encryption and authentication of medical video streams on FPGA

This work presents an FPGA-based solution for the encryption and authentication of video streams of surgeries. The most important is minimal latency. To achieve this, a block cipher with an authenticated mode of operation is used. We choose to use AES128 with Galois/Counter Mode (GCM), because the this mode of operation is patent-free and it allows for random read access. This solution minimizes the overhead on the existing critical path to a single XOR operation. Our solution supports the broadcasting of the video stream. When a new receiver announces itself, it should receive the active keys of the sender. Therefore, a key transport protocol is used to establish a key between the sender and the announcing receiver. A proof-of-concept implementation of the proposed solution has been implemented and tested. While the complete video stream is encrypted and authenticated, the demonstrator confirms that the added latency, which is around 23 s, could not be noticed by the human eye. Random read access and the key establishment protocol provide a flexible solution

Secure remote reconfiguration of FPGAs

This paper presents a solution for secure remote reconfiguration of FPGAs. Communicating the bitstream has to be done in a secure manner to prevent an attacker from reading or altering the bitstream. We propose a setup in which the FPGA is the single device in the system\u27s zone-of-trust. The result is an FPGA architecture that is divided into a static and a dynamic region. The static region holds the communication, security and reconfiguration facilities, while the dynamic region contains the targeted application

The Monte Carlo PUF

Physically unclonable functions are used for IP protection, hardware authentication and supply chain security. While many PUF constructions have been put forward in the past decade, only few of them are applicable to FPGA platforms. Strict constraints on the placement and routing are the main disadvantages of the existing PUFs on FPGAs, because they place a high effort on the designer. In this paper we propose a new delay-based PUF construction called Monte Carlo PUF, that does not require low-level placement and routing control. This construction relies on the on-chip Monte Carlo method that is applied for measuring the delays of logic elements in order to extract a unique device fingerprint. The proposed construction allows a trade-off between the evaluation time and the error rate. The Monte Carlo PUF is implemented and evaluated on Xilinx Spartan-6 FPGAs

ALBUS: a Probabilistic Monitoring Algorithm to Counter Burst-Flood Attacks

Modern DDoS defense systems rely on probabilistic monitoring algorithms to identify flows that exceed a volume threshold and should thus be penalized. Commonly, classic sketch algorithms are considered sufficiently accurate for usage in DDoS defense. However, as we show in this paper, these algorithms achieve poor detection accuracy under burst-flood attacks, i.e., volumetric DDoS attacks composed of a swarm of medium-rate sub-second traffic bursts. Under this challenging attack pattern, traditional sketch algorithms can only detect a high share of the attack bursts by incurring a large number of false positives. In this paper, we present ALBUS, a probabilistic monitoring algorithm that overcomes the inherent limitations of previous schemes: ALBUS is highly effective at detecting large bursts while reporting no legitimate flows, and therefore improves on prior work regarding both recall and precision. Besides improving accuracy, ALBUS scales to high traffic rates, which we demonstrate with an FPGA implementation, and is suitable for programmable switches, which we showcase with a P4 implementation.Comment: Accepted at the 42nd International Symposium on Reliable Distributed Systems (SRDS 2023

High-speed Side-channel-protected Encryption and Authentication in Hardware

This paper describes two FPGA implementations for the encryption and authentication of data, based on the AES algorithm running in Galois/Counter mode (AES-GCM). Both architectures are protected against side-channel analysis attacks through the use of a threshold implementation (TI). The first architecture is fully unrolled and optimized for throughput. The second architecture uses a round-based structure, fits on a relatively small FPGA board, and is evaluated for side-channel attack resistance. We perform a Test Vector Leakage Assessment (TVLA), which shows no first-order leakage in the power consumption of the FPGA. To the best of our knowledge, our work is (1) the first to describe a throughput-optimized FPGA architecture of AES-GCM, protected against first-order side-channel information leakage, and (2) the first to evaluate the side-channel attack resistance of a TI-protected AES-GCM implementation

HEPCloud: An FPGA-based Multicore Processor for FV Somewhat Homomorphic Function Evaluation

In this paper, we present an FPGA based hardware accelerator 'HEPCloud' for homomorphic evaluations of medium depth functions which has applications in cloud computing. Our HEPCloud architecture supports the polynomial ring based homomorphic encryption scheme FV for a ring-LWE parameter set of dimension 2(15), modulus size 1,228-bit, and a standard deviation 50. This parameter-set offers a multiplicative depth 36 and at least 85 bit security. The processor of HEPCloud is composed of multiple parallel cores. To achieve fast computation time for such a large parameter-set, various optimizations in both algorithm and architecture levels are performed. For fast polynomial multiplications, we use CRT with NTT and achieve two dimensional parallelism in HEPCloud. We optimize the BRAM access, use a fast Barrett like polynomial reduction method, optimize the cost of CRT, and design a fast divide-and-round unit. Beside parallel processing, we apply pipelining strategy in several of the sequential building blocks to reduce the impact of sequential computations. Finally, we implement HEPCloud on a medium-size Xilinx Virtex 6 FPGA board ML605 board and measure its on-board performance. To store the ciphertexts during a homomorphic function evaluation, we use the large DDR3 memory of the ML605 board. Our FPGA-based implementation of HEPCloud computes a homomorphic multiplication in 26.67 s, of which the actual computation takes only 3.36 s and the rest is spent for off-chip memory access. It requires about 37,551 s to evaluate the SIMON-64/128 block cipher, but the per-block timing is only about 18 s because HEPCloud processes 2,048 blocks simultaneously. The results show that FPGA-based acceleration of homomorphic function evaluations is feasible, but fast memory interface is crucial for the performance.Peer reviewe

Low-Rate Overuse Flow Tracer (LOFT): An Efficient and Scalable Algorithm for Detecting Overuse Flows

Current probabilistic flow-size monitoring can only detect heavy hitters (e.g., flows utilizing 10 times their permitted bandwidth), but cannot detect smaller overuse (e.g., flows utilizing 50-100% more than their permitted bandwidth). Thus, these systems lack accuracy in the challenging environment of high-throughput packet processing, where fast-memory resources are scarce. Nevertheless, many applications rely on accurate flow-size estimation, e.g. for network monitoring, anomaly detection and Quality of Service. We design, analyze, implement, and evaluate LOFT, a new approach for efficiently detecting overuse flows that achieves dramatically better properties than prior work. LOFT can detect 1.5x overuse flows in one second, whereas prior approaches fail to detect 2x overuse flows within a timeout of 300 seconds. We demonstrate LOFT's suitability for high-speed packet processing with implementations in the DPDK framework and on an FPGA

Protocol for Translabial 3D-Ultrasonography for diagnosing levator defects (TRUDIL): a multicentre cohort study for estimating the diagnostic accuracy of translabial 3D-ultrasonography of the pelvic floor as compared to MR imaging

Contains fulltext : 96237.pdf (publisher's version ) (Open Access)BACKGROUND: Pelvic organ prolapse (POP) is a condition affecting more than half of the women above age 40. The estimated lifetime risk of needing surgical management for POP is 11%. In patients undergoing POP surgery of the anterior vaginal wall, the re-operation rate is 30%. The recurrence risk is especially high in women with a levator ani defect. Such defect is present if there is a partially or completely detachment of the levator ani from the inferior ramus of the symphysis. Detecting levator ani defects is relevant for counseling, and probably also for treatment. Levator ani defects can be imaged with MRI and also with Translabial 3D ultrasonography of the pelvic floor. The primary aim of this study is to assess the diagnostic accuracy of translabial 3D ultrasonography for diagnosing levator defects in women with POP with Magnetic Resonance Imaging as the reference standard. Secondary goals of this study include quantification of the inter-observer agreement about levator ani defects and determining the association between levator defects and recurrent POP after anterior repair. In addition, the cost-effectiveness of adding translabial ultrasonography to the diagnostic work-up in patients with POP will be estimated in a decision analytic model. METHODS/DESIGN: A multicentre cohort study will be performed in nine Dutch hospitals. 140 consecutive women with a POPQ stage 2 or more anterior vaginal wall prolapse, who are indicated for anterior colporapphy will be included. Patients undergoing additional prolapse procedures will also be included. Prior to surgery, patients will undergo MR imaging and translabial 3D ultrasound examination of the pelvic floor. Patients will be asked to complete validated disease specific quality of life questionnaires before surgery and at six and twelve months after surgery. Pelvic examination will be performed at the same time points. Assuming a sensitivity and specificity of 90% of 3D ultrasound for diagnosing levator defects in a population of 120 women with POP, with a prior probability of levator ani defects of 40%, we will be able to estimate predictive values with good accuracy (i.e. confidence limits of at most 10% below or above the point estimates of positive and negative predictive values).Anticipating 3% unclassifiable diagnostic images because of technical reasons, and a further safety margin of 10% we plan to recruit 140 patients. TRIAL REGISTRATION: Nederlands trial register NTR2220

Cardiac regeneration: different cells same goal

Cardiovascular diseases are the leading cause of mortality, morbidity, hospitalization and impaired quality of life. In most, if not all, pathologic cardiac ischemia ensues triggering a succession of events leading to massive death of cardiomyocytes, fibroblast and extracellular matrix accumulation, cardiomyocyte hypertrophy which culminates in heart failure and eventually death. Though current pharmacological treatment is able to delay the succession of events and as a consequence the development of heart failure, the only currently available and effective treatment of end-stage heart failure is heart transplantation. However, donor heart availability and immunorejection upon transplantation seriously limit the applicability. Cardiac regeneration could provide a solution, making real a dream of both scientist and clinician in the previous century and ending an ongoing challenge for this century. In this review, we present a basic overview of the various cell types that have been used in both the clinical and research setting with respect to myocardial differentiation